Hi Terry, How clean is A-D reference(VREFB,VREFT)? Another possibility is a timing issue, PLL not working properly. The wait time after INCLK or after soft reset should be 50mS. One suggestion is to check page 0 reg0 bit 7-PLL and bit5 - SH_R. Is SH_R bit set to default 1? a random change may cause this issue. Please e-mail me a screen shot at: costin.cazana@ti.com Thanks, Costin
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