Hi Noriyuki, I agree with your estimation of the worst case error based on the reference tolerance and TUE of the current output. Since you used the min and max values I would expect in measuring across several devices it would be much closer to the typical value for TUE. We typically use the root sum of squares to approximate the error if the error sources are independent. Are you using the external NPN transistor in the 'boost mode configuration' as seen in Figure 56 of the datasheet? This mode is selected on the EVM by JP5. Using the external transistor will create additional gain error as shown in Figures 15 through 17 in the typical characteristics section of the datasheet. Are you using external or internal Rset? Using the external gain setting resistor also contributes to the overall error. Thanks, Garrett
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