Hi Livio, Thanks for your post and welcome to the forums! Are you in RDATA or RDATAC mode? Could there be a miscalculation for how many SCLKs are being sent when you change the frequency? From the datasheet: The absolute maximum SCLK limit is specified in Figure 1. When shifting in commands with SCLK, make sure that the entire set of SCLKs is issued to the device. Failure to do so can result in the device serial interface being placed into an unknown state requiring CS to be taken high to recover. Instead of removing power and doing a hard reset, perhaps you can toggle /CS. Unfortunately since the PI3B is not a TI device and I cannot offer much support, however I am curious that the PI3B cannot detect DRDY without a long delay. How long of a delay are you seeing?
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