Thanks for following up Ted. The hardware design is locked down so can't really make any changes there; however I can change the interface that drives the ADC. That's what prompted my question. When I read your response, it sounds like a qualitative thing. The ADC will produce better results if I give it more than the minimum 187.5ns acquisition (sounds like 2x is a good start). I think I was just looking for a spec on that. Anyway, thanks for all of your help. Regards, John
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