Hi Dan, I have the Sync lines for each DAC connected to the FPGA - the second connection was made to LA_33_P/N_A (pin G36/37 on the FMC) so that either IC can request a sync. I'll be modifying the TSW source to utilize some additional control lines and that's one of the changes on my list. I'd like to connect the second Sync line to TX_ALT_SYNC_P/N, but I don't think I can get the lines out without tearing up my comm lines. There will likely be some timing differences, as the pins are on different banks, but I'm hoping I can compensate for that within the FPGA. If you think that will be problematic, please let me know and I can try a bit harder to gain access to the ALT_SYNC pins - I found some clock issues on Friday and am in the process of moving some lines around. For the INI file, are there any guidelines to the variables and what they mean? I didn't want to just start changing things and end up breaking it, but I would like to have a better understanding of which variables need to be changed to utilize the full 8 channels. If I have to use two files to load the waveforms, that would be doable, but changing INI files wouldn't be feasible. Thanks for your help Justin
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