Part Number: DAC37J84EVM Hi all, I've followed the DAC3xJ8xEVM user guide (slau547b) and successfully got our DAC37J84EVM working with a TSW14J56 pattern generator, where the input data rate of the DAC is 368.64 MSPS with both the SerDes lanes and interpolation set to 4, as outlined in the user guide. I would like to increase the input data rate to 737.28 MSPS, which I have attempted to do by using all 8 SerDes lanes with an interpolation of 1 (set through the 'quick start' panel in the dac gui software), and using the 'DAC3xJ84_LMF_841' firmware in the high speed data capture pro software. This configuration does not produce any output when I try to send test patterns (using the HSDCP software) to the DAC. Note that I have the EVM clocking mode set to 'on-board'. Any configuration suggestions for using the DAC37J84EVM and the TSW14J56 at input data rates over 368.64 MSPS would be greatly appreciated. Regards, Jon.
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