Hi Ranjith, Most likely, you are missing the MSB of the conversion result. The MSB will always be latched on the 10th DCLK rising edge. This would mean that you must use SPI Mode 0 (CPOL = CPHA = 0). I also forgot to ask, how many clocks per conversion are you sending? To answer your other questions, the DCLK and conversion rate are not the same. The DCLK is your only clock input to the device and used both for conversions and for serial interface. The DCLK frequency and the number of clocks per conversion (15, 16, or 24) set the conversion rate. For example, if you are aiming for 5 kSPS with 16 clocks per conversion, DCLK must be at least 80 kHz. The command byte will overlap with the conversion data from the previous acquisition in that case (see Figure 4). Best Regards,
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