Ravikant, The 16-bit DAC resolution is the resolution of the DAC output swing and the granularity of the output swing (i.e. how fine we can represent the Y axis). It has nothing to do with the length of the pattern (i.e. X axis or time resolution). The length of the pattern is limited by your FPGA design. You will need to include DDR memory in your FPGA design to increase the length of the pattern being loaded onto the pattern generator. Using the on-chip memory of the FPGA sounds like are not sufficient for your design. -Kang
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