Thank you very much for your help. I was able to obtain 1kHz DRATE and fixed alot of problem between the Arduino code and ESP32. However, could you help me take a glance at the following logic analyzer images as I was not able to detect anything obvious. 1) Reset to Power-Up 2) Setup Status Register (after delay 1ms) 3) Setup A/D Control Register (after delay 1ms) 4) Setup DRATE (after delay 1ms) 5) Perform Offset and Gain Self-calibration command 6) Setup MUX and Channel (No Muxing, I am trying to read the differential voltage between AIN0 and AIN1) 7) SYNC and WAKEUP (After delaying 5us) 8) Inside While loop RDATA (There is a noise signal on the logic analyzer CS Enable (4) that prevents the SPI bits intepretation) Read Data Stream (I checked that the t6 was much bigger than 50 * tFclock ). Do I need to keep CS LOW between RDATA command and the 24-bit MISO stream? DRDY is indeed 1kHz, so I assume that any WREG actions are done correctly as well. I don't fully understand why there is nothing on the MISO line in the last figure. Thank you, Khoi Ly
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