Hi Khoi, You should add a delay after /CS goes low (see "t3" in the datasheet), before the first SCLK rising edge. Without this delay the ADS1256 may not register the first SCLK edge and communication will get out-of-sync. Sometimes you have to use a GPIO for /CS, as some micros do not give you much control over the built-in SPI control signal timing. Also, the DOUT signal doesn't look right. DOUT should transition on the rising edge of SCLK, and HOLD it' level until the next rising edge. The pulsing that you've shown is not normal behavior. Currently it looks like you are observing a signal that is capacitively coupled to DOUT. Regarding your question...yes, /CS needs to remain low after sending the "RDATA" command. It should back high only after you've clocked out the data.
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