Hi Niall, How are you? We are using TSW1400EVM to capture the ADS5296A output data. Also we already verified using both 10bit mode and 12bit mode register setting and received the output data using TSW1400EVM and GUI. Both show the full scale ramp patterns (in both bit modes) are showing the increment in step of 1. Since you are using the different capture FPGA which can not be characterized by us. So please re-setup the following register settings for ADS5296A device as followings before you will be capturing the output data from your own FPGA: Please make sure to set: Addr=0x00, Data=0x0001 Addr=0x00, Data=0x0000 Addr=0xBE, Data=0x80B3 Addr=0x40, Data=0x8000 Addr=0x46, Data=0x8200 Addr=0x46, Data=0x8100 Addr=0x45, Data=0x0000 Addr=0x25, Data=0x0040 Hope this can help you capture the full scale ramp pattern data correctly. Thank you! Best regards, Chen
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