Hi Garrett, Thank You for your response. In the scopes that I had posted clock signal was showing 100mV. But that was not tuned scope. Actually clock signal is coming as 3.2V. I have just cross checked. Sorry for the inconvenience. 1. I don't understand how exactly I can measure the input current which is flowing into AVDD and AVSS? Does this have any relation with continuous 0.5V at Vout? 2. Actually while doing design we have not considered thermal pad of the device. I think it is connected to common GND. But in the data sheet it is mentioned that it is internally connected to AVSS. Is it a problem if thermal pad is connected to common GND? 3. Actually, we have one more mistake in our design. At the output, in ESD protection circuitry, for the TVS diode array IC (IC18) +12V is given to I/O pin. But it should be given to Vp pin. You can look at the schematic. Correct Schematic But physically it is connected as below schematic which is wrong Internal circuit of IC18 is as below Also internal circuitry of IC 20 is as below I think this wrong connection does not affect the Vout right? Thank You
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