Hi Keith, Many thanks for the warm welcome and thank you for getting back to me. Yes, I was in fact talking about figure 24. I had previously built a circuit where I replicated the 0.1 and 1uF capacitances for each of the ADCs and was having some issues. So I will now only put one set of the 0.1uF and 1 uF close to the regulator, and then have the 0.1uF and the 680nF capacitors for the Dvdd and Avdd respectively, for each of the ADCs. Is that correct? Many thanks for the link to the PCB layout guidelines. Regards, Josef
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