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Forum Post: RE: ADC12DJ3200: ADC12dj3200 calibration and SNR

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Hi Shervin I imported your data to High Speed Data Converter Pro so I could do equivalent processing. The attached file has the original information plus several slides showing your data using standard performance calculations, and a few with specific tones notched out. (Please visit the site to view this file) What I see in your results are some spurs that I don't expect to be that high, along with worse than expected HD2-HD5 performance. I would recommend double checking that none of these spurs are present in the input signal applied to the ADC, or at frequencies that could alias back into the ADC spectrum. I would look at the applied signal using a spectrum analyzer with a span from 0 Hz to at least 8 GHz. If you are not already doing so, please add a bandpass filter into the signal path to ensure only the intended signal is applied. If bandpass filters are not available then a lowpass filter can also be used. If the input signal is already clean I would then look to any possible noise coupling onto the ADC clock or power nets or potential ADC setup issues. If the ADC is on a board of your design I would like to review the register setting/sequence being used, and the schematic if that can be shared. I hope this is helpful. Best regards, Jim B

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