Hi Chief, As I explained in the other post , there may not be any issue with the purely DC coupled approach with pull-up resistors to RLDOUT. Any offsets introduced by the pull-up resistors may not be an issue for lower gain settings. Most likely, PGA gain of 3 to 6 V/V will still have sufficient headroom and still give you the benefit of input-referring the ADC noise low enough. I'm not convinced yet whether it's possible to achieve a CMR benefit from the RLD loop in this manner. Regards,
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