Part Number: ADS54J66EVM hi all, Actually iam using ADS54J66EVM board for testing jesd interface by using KC705 evaluation board. In the ADS54J66 datasheet http://www.ti.com/lit/ds/symlink/ads54j66.pdf on page no 23, they have given a table for different modes of operation. I want operate at mode no 8 (no decimation), can anyone explain the relation between input clk frequency to the ADC and output data rate of ADC. Thank you.
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