Hi all,
I encountered some problems when testing the AFE5801. The chip is connected with the Xilinx V5- FPGA board using the SPI BUS. The digital signals writen into the SDATA port are: 24'h000001(self-RESET),24'h000004(Access to TGC registers), 24'h99XXXX (FINE_GAIN, of which 0x99[3]=1 to set the STATIC_PGA mode), 24'h9aXXXX (COARSE_GAIN), 24'h000000(Access to general-purpose registers), 24'h000002(Enables readout of the registers), 24'h990000(address of the register to be read (FINE_GAIN) ).
After all of these settings, I got nothing from the SDOUT pin. Onmultichanneloscillographs can be read the input SPI signals, which are all correct. Please tell me where I got wrong. THANKS A LOT!