Hi Chuck, pt 5: For the GND connection we are using the GND on P14 which is board GND. Q1: We are using P14, but we’re doing the following instead to disable the optos: Short U16 pins 9 & 10, lift U20 pin 10 & tie to GND (pin 9). This should give the same effect as removing FB17. Q2: I use (amongst others) register 0xA1 (reg. 0x21 in sub-chip 1), which is a read/write 16-bit MANUAL_FREQ value. Q3: No, we use an external microprocessor with built-in SPI. Q4: We started out like this but could not get any register reads to work. Now the board is wired for external SPI so is not easy to go back and test it again. Our theory now is that spikes on the flying leads between our development CPU board and the AFE5809EVM board are causing occasional glitches in the SPI signals (although the 'scope traces look OK), so w e will await our first production hardware before testing AFE5809 SPI again but that it’s good news that you get reliable reads from the demod registers. Thank you for your help so far, Duncan
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