Hi Martin Your configuration settings (other than Page 0, Register 0) look OK, but I'm not sure the configuration sequence you are using is completely correct. Please confirm you are now following the required procedure listed in the Operational Setup Sequence in section 7.5.1. The Lock Bit (Page 0, Register 0, Bit 0) must be 0 during most configuration changes. If the Lock Bit is 1, then many key registers are write only. Also please confirm the PLL Locked bit is set (Page 0, Register 0, Bit 7) before changing the Lock Bit to 1. When all configuration values are set, then change this bit to 1. This should start the line/pixel/sample timing generation in Master Mode. You can also confirm that all of your register writes are working by reading back those register values. Best regards, Jim B
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