@Christian Yes, sorry. JR1 is correct. I misread the schematic as I was typing my post. Before powering the rest of the board, I checked that I was getting the correct voltages on pin 5 of both JP6 and JP7. Once verified, I connected pins 5 and 6 on both jumpers to supply the rest of the board. U3 and U4 should be powered by the board. Is there some reason I should think otherwise? When applying INCLK, I did verify that I was seeing the proper signal at TP22 and TP23, so I think I can assume that U3 and U4 are correctly powered. @Kirby Ah ok. Perhaps I'll try the serial interface at lower speeds without INCLK, just to see what happens. I did check the INCLK signal at TP22 and TP23, and everything looked correct. I will double check this though. And yes, I'm writing all registers at startup and I'm aware of the comment in the datasheet that says I should write register 0x3D before register 0x09. Could you please advise on the best write order at startup? I think my current strategy has been the following: Write registers 0x25 and 0x06 to ensure proper INCLK configuration Write all of the remaining registers in order (including reserved registers), starting at 0x3F and ending at 0x00. I have tried a few different approaches here, including: skipping the reserved registers writing registers 0x25 and 0x06 in order with the rest of the registers skipping register 0x28 so as not to disturb the DLL But it seems like I inevitably have problems, regardless of the write order. You say that I should not be experiencing a false lock and that the false lock bit should never bit set in normal operation. Can you suggest any other possible causes of false lock? Would you expect a false lock to cause intermittent and irreproducible problems with the serial interface? Thanks for your help, Bradley
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