Hi Toshi The LMK04828 is only used in distribution mode. The RFoutB output at 1406.25 MHz from the LMX2582 is input to the LMK04828 . The LMK04828 just divides this down to create the needed CLK and SYSREF signals for the FPGA. Since the LMK04828 input clock is the same frequency as the ADC clock, the divider values are constant for a given JMODE setting. This allows the existing LMK04828 _JMODEx.cfg files to work regardless of the ADC clock frequency created by the LMX2582 . The existing files for JMODE0 and JMODE2 use a divide by 10 to create the FPGA clock, so I suspect the customer is using either JMODE0 or JMODE2. I verified that everything works in JMODE2 using the new LMX2582 configuration file, and the existing configuration files for the ADC and LMK02828. I hope this is helpful. Best regards, Jim B
↧