Hello, The power-supply sequence prescribed in the datasheet should be followed. Any time a datasheet indicates a recommended sequence, this is the case. Generally speaking the internal OTP memory is powered on the digital domain (DVDD). If the digital rail is not powered when the analog supply ramp crosses the comparator threshold to trigger OTP reads, the analog circuits will effectively load invalid OTP memory values which can corrupt trim coefficients and other device parameters. I don't totally follow exactly what happened in your second paragraph case, but one potential is that the offset error trim values were not loaded correctly due to this sequencing and this is what has lead to unexpected offset on the channel you have described.
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