Forum Post: RE: ADS1292R: ADS1292R
Hello YT, Thank you for your post and welcome to our forum. Please review the register settings for lead-off detection (LOFF 03h). There is no internal resistor pull-up/pull-down method available in...
View ArticleForum Post: ADS122C04: How to convert internal temperature sensor readout
Part Number: ADS122C04 How is the readout of the internal temperature sensor converted to real temperature (Kelvin or °Celsius)? TIa, Beat
View ArticleForum Post: RE: DAC80504: DAC output configuration
Thank Kevin for the quick reply. I already implemented the DIV=GAIN=0 option so unfortunately I'm going to use it although not been tested by TI fab... I was concerned that this option has worse analog...
View ArticleForum Post: RE: ECCN Classification number
Shrawni, According to what was able to find, the SMJ55161-80GBM is now obsolete, but last had a ECCN code of EAR99. However ECCN classifications are always subject to change and I'm not sure what...
View ArticleForum Post: ADS1298: Using ADS1298 and ADS1294R in daisy chain mode. Issues...
Part Number: ADS1298 Hi, We are working on a 12-Lead ECG + Resp design using the ADS1298 and ADS1294R parts. We have them connected up in Daisy chain mode, with the Master in the chain being the...
View ArticleForum Post: RE: ADS8509: Data Read
Hi Richard, Welcome to E2E forum. There is one session to introduce the edges for reading the data when an external DATACLK is used, please refer to EXTERNAL DATACLK session in page 16 and 17 of...
View ArticleForum Post: RE: ADS1218: Relation between the differential input voltage and...
Makesh, I'll just answer your questions in order. 1. The PGA basically increases the input signal by the gain factor to for measurement by the ADC. If you measure a 1V input with the ADS1218 using a...
View ArticleForum Post: RE: ADS1298: Using ADS1298 and ADS1294R in daisy chain mode....
Hi Dylan, Thanks for your post and welcome to the forum! Are you pulling /CS low on the slave device? For daisy-chain operation, /DAISY_EN (CONFIG1[6]) must be set to 0. You can write this value to...
View ArticleForum Post: ADS1118: power consumption of ADS118 in single shot mode
Part Number: ADS1118 Hi, ADS1118 continues mode current consumption is 150uA. If I am taking one reading in every 2 seconds in Single-Shot Mode, how can I calculate current consumption? Regards, Sundar
View ArticleForum Post: RE: DAC38J84: eye scan via Jtag
Hello Bob, The following link is a TI BOX share link with our source code Eye scan tool. It is valid for 7 days only so please download this as soon as you can....
View ArticleForum Post: RE: ADS1232: Output counts
Hi Tom, After adding ADC calibration on Power up the issue is resolved. Thanks, Sreekanth
View ArticleForum Post: RE: DAC38RF89: Confirming ILA_CFG
Hi Brian, The short pattern transport layer testing is purely testing the transport layer (i.e. data packing layer) between the FPGA and DAC. This should be done after the phyiscal layer testing (i.e....
View ArticleForum Post: Looking for an FPGA ADC
I am working on a project and we need a 4 channel, 18bit, 5-10MSPS ADC that can interface with an FPGA development board. We are looking at using a Digilent Nexys Video Artix-7 board because it has an...
View ArticleForum Post: RE: ADC32RF45: Problem with ADC32RF45 Ramp Pattern in Bypass Mode
Good day Jim, When writing "0x7002, 0x01 0x6002, 0x01 0x7037, 0x00 0x6037, 0x00" the ADC's output resolution is configured to 14 bits. We need to configure the output resolution to 12 bits (LMFS =...
View ArticleForum Post: RE: DAC38RF89: Confirming ILA_CFG
Brian, Based on my understanding of the other similar devices, the JESD handshaking protocol is before the lane mapping cross bar. This means that the Lane ID check is checking the physical lanes. You...
View ArticleForum Post: RE: ADC32RF45: Problem with ADC32RF45 Ramp Pattern in Bypass Mode
Francois, The attached file generates a proper ramp on our setup in 12 bit mode (82820). The config file is attached for you to compare to your settings. Regards, Jim (Please visit the site to view...
View ArticleForum Post: RE: DAC80508EVM: DAC80508EVM Altium Files?
Hello Duncan, You are correct that this is an Altium based design. You'll find the EVM design files attached. Thanks. (Please visit the site to view this file)
View ArticleForum Post: RE: ADC12J1600: ADC12J1600 to KC705 FPGA: Verilog code
Hi Mahesh The source code for the TSW14J10_KC705 firmware is located here, in the Software section of the folder: Look for " TSW14J10EVM Xilinx Firmware Source (Rev. C) " I hope this is helpful. Best...
View ArticleForum Post: RE: DAC7716: Output voltage shifted after applying only AVDD and...
Hello, The power-supply sequence prescribed in the datasheet should be followed. Any time a datasheet indicates a recommended sequence, this is the case. Generally speaking the internal OTP memory is...
View ArticleForum Post: RE: DAC8728: DAC 8728 reference input voltage
Hello, In the end the digital domain controls the switches implemented in the resistor-based DAC core. As such those switches (MOSFETs) must be biased appropriately from the digital domain to allow for...
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