Hi Bob, If the download link didn't work, would you try this link again? I have thought of something that might work. The FTDI USB chip on the DAC38j84 EVM is routed to the Altera CPLD, and some of the CPLD outputs are routed to pin headers. We have the following CPLD code that you can perhaps re-compile to straight up buffer the FTDI JTAG bus. (the JTAG bus on FTDI chip is on page 8 of the schematic, whereas the CPLD routing is on page 3 of the EVM schematic). You can perhaps ask your FAE to order you an DAC38j84 EVM, and modify the CPLD file so you can hook up the JTAG lines to your PCB. You may also do the same type of trick for SPI bus for DAC configuration(Please visit the site to view this file)(Please visit the site to view this file)
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