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Forum Post: RE: ADS61B29: Questions about trace lengths and proper termination to FPGA

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Hi Carolus, 1. From datasheet Page 4, the volatge at the analog input pins should never go below -0.3V or above min(3.6V, AVDD+0.3) 2. The ADC will saturate if you exceed the 2Vpp Full scale differential swing. The ADC will recover immediately when the input differential swing is restored to 2Vpp or under. However if the absolute max rating was violated, the operation of the ADC can not be guaranteed. Thanks, Eben.

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