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Forum Post: RE: ADS1256: Setting up the SPI Logic Analyzer for ADS1256

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Hi Khoi, If you can, try to avoid any kind of "printf()" or print to terminal command within each read loop. Typically, these types of operations are processor intensive and might prevent you from servicing the next /DRDY interrupt quickly. To answer your questions... Yes, as long as you reading data continuously from a single ADC channel you should see /DRDY falling edges at a rate of 1kHz. Send all three bytes at the same time! If /CS is toggled between bytes, it will abort the WREG command and the ADC's data rate will not get updated. I believe Figure 35 is correct... In that example two registers are being written, so the 2nd command byte is 1 less than the number of registers. In your code snippet you are attempting to write to a single register, so you are correctly setting the 2nd command byte to zero.

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