This is the waveform of the SYNCB signals from each DAC (0 to 3 starting from the top) after issuing a sysref request. DACs 3 and 4 seem perfectly fine, deasserting SYNC about 40 cycles after sysref. DAC 0 receives the SYSREF and SYNC asserts at the same time as DACs 3 and 4 but it never deasserts SYNC.There is a FIFO Read error on this DAC. DAC 1 asserts SYNC 6 cycles earlier than the other 3 DACs and never deasserts it.There is a FIFO Read error, Code Synchronization, 8b/10b not in table, and 8b/10b disparity error for this DAC's lanes.
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