Hi Makesh, This is normal behavior for the ADS1218 in that after the last SCLK the output of DOUT changes to a high impedance state and is no longer driven. This is indicated in the Timing Specification Table as t9 shown on page 9 of the datasheet. So there is a hold time after the last falling edge of SCLK to make sure the DOUT is read correctly. Best regards, Bob B
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