Hi Ninad, Welcome to our e2e forum! As noted in the original post on the ADS1298 , are you reading out the data between DRDY pulses, ensuring that your SCLK is fast enough to retrieve all of the conversion results? The DRDY output will go high with the first SCLK after you start reading the conversion results. It should return low once the next conversion sample set or ready to be retrieved. Can you provide register details and post a scope or logic analyzer screen shot showing your communication sequence and perhaps a schematic showing your ADS1298 connections?
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