Hi Chris, Thank you for your answer. The spec you were referring to is one for fCLKIN which is the master clock for ADC. We are asking about SPI clock duty. In general, I think that a master clock requires nearly 50% duty due to the stable oscillation. We are expecting that SPI clock is just detecting the rising/falling edge and setup/hold timing and does not matter duty itself. Could you please confirm it again? Regards, Uchikoshi
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