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Forum Post: RE: ADS1255: SPI clock SCLK duty spec

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Hi Uchikoshi-san, Yes I was referring to fCLK, I'm sorry I misunderstood. I believe you are correct, if you meet the minimum setup and hold times of the SCLK then it shouldn't be an issue since generally the device only looks at the rising and falling edges of the SCLK signal. To be sure, I will need to check with the design team tomorrow and get back to you.

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