I'm still confused. "The maximum output swing with 200 ohm load is 5.6Vpp differential at the amplifier differential outputs. As you state, at this level each amplifier output is swinging from +1.4V to -1.4V. Once the attenuation of the 40 ohm resisters are taken into account the maximum voltage at the ADC inputs would be +0.778V and -0.778V." The maximum output swing of OUT+ - OUT- is 5.6 Vpp, so OUT+- should each swing between +-2.8 Vpp. If we then model the each line as a voltage divider like so: OUT+- -------- 40 Ω --------- VLoad+- = 50 Ω, we should get Vload+- = 50/(40 + 50) * OUT+- = 0.555 * OUT+-, such that Vload+ - Vload - = 0.555 (OUT+ - OUT-) = 3.1 Vpp OR is it the case that Table 1's Termination Loss indicates that even if OUT+ - OUT- is 5.6 Vpp, only 2.8 Vpp gets transferred downstream? Thus results in Vload+ - Vload - = 0.5 * 0.555 (OUT+ - OUT-) = 1.56 Vpp Doesn't it seem odd that Vload+- has dropped twice from OUT+-? Let me make sure that I understand this correctly. Please consider this circuit: _______ ___________ Signal----| |--40Ω--| | | LMH3401 | | ADC12DJ3200 | VDC--50Ω--|_______|--40Ω--|___________| | v The gain of LMH3401 is 16 dB, but with matching termination and the 40Ω resistive loss, the net gain from SE Signal to ADC Diff In is (16 dB - 6 dB) + 20 * log10(5/9) = 4.9 dB, or in voltage sqrt(10) * 0.55 = 1.76 V/V Thus, the differential input as seen by ADC12DJ3200 is 1.76 * (Signal - VDC) Also, the voltage loss from LMH3401 out to ADC12DJ3200 input is 0.275, resulting in the max output 1.56 Vpp. For the ADC12DJ3200 , INA+- max/min are +/-1 V, so the maximum allowed differential input is 2 Vpp, so as you stated, the 1.56 Vpp that reaches the ADC12DJ3200 does not exceed the Terminal Voltage Range for INA+-. With a default full scale of 800 mVpp, the ADC will clip from the 1.56 Vpp input, even though it doesn't get damaged. But does this clipping cause problems to the ADC? e.g. does it introduce memoried distortions? Or does ADC operation continue working properly immediately upon the differential input voltage falling within full scale? Another thing from the LMH3401 datasheet: "In order to maintain proper balance in the amplifier and avoid offsets at the output, the unused input pin must be biased to the same voltage as the input dc voltage, and the impedance on the unused pin must match the source impedance of the driven input pin." In my design I want the average voltage presented to the LMH3401 inputs to be different. That's because Signal is not symmetric, i.e. the voltage duty cycle is far from 50%. Does it cause problems in the amp to not have a balanced input? Finally, if one connects the LMH3401 directly to ADC12DJ3200 without 40 Ohm resistors on a board (trace length < lambda / 10) thus bypassing resistive loss, what would the voltage loss 0.275 be improved to?
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