Hi, I am using LM98722 with a Trilinear CCD in my application. The sensor timing is basically generated using FPGA . INCLK is 5 MHZ. R, G, B analog signals are connected to the IC. Serial communication works great. I can write and read the registers of LM98722 . I tried both Master and Slave mode, but my AFE doesnt seem to output any signals. My conguration is CMOS Output, INCLK is PIXEL CLK, CLLOUT on SH2. I am not getting any CLKOUT signal. My register configuration in Master Mode is given below in text file. My final configuration is slave mode without timing generation. (Please visit the site to view this file) Any help is greatly appreciated. Best Regards, Pranav Balakrishnan Team Member - R & D Firmware Premier Evolvics Private Limited, India
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