Hi Martin Sorry, I didn't see a write of 22h to Page 0 Register 0. Can you send the updated register write sequence you are using? Per datasheet section 7.4.25, the input clock should be either stopped or running continuously during SPI writes and reads. And after either starting or stopping the INCLK (or first power-up of the device) the user should wait at least 50ms to allow the internal logic and PLL to stabilize before beginning serial communication. The PLL Locked bit is a read-only status bit. If it is 0 it means the PLL is not locked. This will be the case of the INCLK is stopped, or if the PLL has not had time to lock to the provided INCLK. Best regards, Jim B
↧
