Forum Post: RE: LM98640: LM98640 ESD pulse
Hi Praveen, I come back to know if you have any feedback about my request? Thanks Matthieu Baque
View ArticleForum Post: RE: LM98640: LM98640 ESD pulse
Hi Matthieu, I apologize for the delay in my response. I am moving your post to the Imaging AFE forum where the device is currently being supported.
View ArticleForum Post: TX-SDK-V2: Pattern length issue(LM96570 of TX-SKD-V2)
Part Number: TX-SDK-V2 Hi Im a graduate school student in Korea. I have a problem with the pattern length of tx-sdk-v2 . I am conducting research related to ultrasound stimulation. So we are examining...
View ArticleForum Post: RE: LM98640: LM98640 ESD pulse
Hello Matthieu, I have asked my product engineer to find the ESD data for this device so we can compare it to your stated conditions. I will update you when I have the data.
View ArticleForum Post: RE: LM98640: LM98640 ESD pulse
Hello Matthieu, It is difficult to apply ESD test results to other overstress scenarios. It really depends upon the duration fo the pulse. An ESD pulse is only nanoseconds.
View ArticleForum Post: RE: TX-SDK-V2: Pattern length issue(LM96570 of TX-SKD-V2)
Hi Mintack, The folks in the Imaging AFE forum can provide a better response for you, so I am moving the thread over there. Regards,
View ArticleForum Post: RE: LM98714: What's difference between LM98714BCMT and LM98714CCMT?
At the present time there is no difference. However, it appears that in the past, there needed to be two different part numbers because the CCMT was converted to RoHS compliance in 2006, but the BCMT...
View ArticleForum Post: RE: LM98725 PLL Unlock
Hello Hyungsung, TI does not guarantee the device to be operational if the absolute maximum ratings are exceeded. If the LM98725 experiences temperatures higher than 235 C, it is possible that it is...
View ArticleForum Post: RE: TX-SDK-V2: Pattern length issue(LM96570 of TX-SKD-V2)
Hi Mintack, The limitation of the pattern length to 64 pulses is coming from the device LM96570 .
View ArticleForum Post: RE: LM98640: LM98640 ESD pulse
Hi Kirby, I agree that it's difficult to use ESD test results for other tests but I would like to have an opinion. Could you explain me what could be the problem, is a thermal issue on the ESD diode...
View ArticleForum Post: RE: LM98640: LM98640 ESD pulse
I would expect your conditions to damage the part. It is a thermal condition due to the long pulse time.
View ArticleForum Post: RE: LM98640: LM98640 ESD pulse
Matthieu, My product engineer responded to me with the ESD information. The HBM ESD voltage the LM98640 can withstand is 4000 V. For this test, we supply 4000 V with a peak current of 2.40-2.93 A for...
View ArticleForum Post: RE: LM98725: SH1 output doesn't toggle during CCD readout. phiA,...
Hello Rom, What clock frequency are you supplying to the LM98725 ? Page 26 in the datasheet says that Mode 1 can only take a maximum input clock frequency of 25 MHz. Can you please check to see if...
View ArticleForum Post: RE: LM98725: SH1 output doesn't toggle during CCD readout. phiA,...
Hello, James. I used 1, 5 and 10 MHz clock input without major difference. The plots are provided for 5 MHz clock. I used no averaging on the signal. My scope has 50 MHz analog BW and freshly...
View ArticleForum Post: RE: LM98725: SH1 output doesn't toggle during CCD readout. phiA,...
Rom, What kind of clock source do you have going to your INCLK+/- pins (LVDS or CMOS)? Are you following the external clock layout requirements on the bottom of page 16 in 7.3.6.1?
View ArticleForum Post: RE: LM98725: SH1 output doesn't toggle during CCD readout. phiA,...
Good day. The clock is configured as single ended: I push clock through CLK+ input port. CLK- input is grounded by a jumper. I did not populate the 50 Ohm resistor.
View ArticleForum Post: RE: LM98725 PLL Unlock
Hello James I adjusted reflow temperature under 235℃, but still occur same problem (PLL unlock). After power on, during calibration scan, pll unlock occurs. But it occurs not everytime, about 1 of 500...
View ArticleForum Post: RE: LM98725 PLL Unlock
Hyungsung, Since you observe the error infrequently and only at power up, I wonder if it is related to somehow to your supply rails. Are you powering all the supply rails of the device with 3.0-3.6 V,...
View ArticleForum Post: RE: LM98725 PLL Unlock
Dear. James I'm not using RESETn pin. I have question about RESETn pin. How long is the minimum time of maintaining RESETn low? There's no information of RESETn timming on datasheet. please reply. best...
View ArticleForum Post: RE: LM98725 PLL Unlock
The Serial Interface Timing Specifications should be good to use for RESETn. This sets the minimum time to 4 ns (Input Hold + Input Setup), so choose a time greater than this (maybe double). If you can...
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