Forum Post: RE: AFE5808 VCA_PDN_CH register not found on table
Chuck, Thanks. I would wait for your answer. Best Regards Dylan
View ArticleForum Post: LM96570 -- SPI message length
Hi Team, I am using an application with a custom SPI controller than accepts 8, 16 and 32 bit SPI responses. Some LM96570 messages are 22-bits. What would the expected behavior be if the controller...
View ArticleForum Post: RE: AFE5808 VCA_PDN_CH register not found on table
Hi Chuck, Any update? Dylan
View ArticleForum Post: RE: LM96570 -- SPI message length
Hello Rob, This is the answer I got from the experts: "The incoming data length has to match the length of register to be written in order to play safe. If customers need to stuff the data stream into...
View ArticleForum Post: AFE5808A part ADC output in offset binary and 2's complete format
Hi, For AFE 58088A part, If I configure custom test pattern as ex:- 0x3FFF, 0x2000, 0x3000, 0x1900 respctively. What are the expected respective outputs in 16bit serialization mode. The output in...
View ArticleForum Post: RE: AFE5808 VCA_PDN_CH register not found on table
Hi Dylan, 1. This is referring to PDN_CH which is address 53. 2. I will measure this today. Chuck
View ArticleForum Post: RE: AFE5808 VCA_PDN_CH register not found on table
Hi Chuck, Thanks. I can't find this register from datasheet. Is it a internal hidden register? can you share some materials to me? my email is dylan-yao@ti.com Best regards Dylan
View ArticleForum Post: RE: AFE5808 VCA_PDN_CH register not found on table
Hi Dylan, 1. This is a typo in the datasheet. The reference to VCA_PDN_Ch is refering to register 53 called "PDN_CH[7:0]" on page 33. 2. I measured this today and the current consumption of these two...
View ArticleForum Post: RE: AFE5808A part ADC output in offset binary and 2's complete...
Chandu, From the DS, page 30: Users can write the required VALUE into register bits which is Register 5[13:0]. Then the device will output VALUE at its outputs, about 3 to 4 ADC clock cycles after the...
View ArticleForum Post: RE: AFE5808A part ADC output in offset binary and 2's complete...
Hi, 1) According data sheet of AFE5808 , by default the ADC is capable of generating 14 bit signed 2's complement. It can also be configured to 12 bit. Am i right? 2) I configured the AFE as 16x...
View ArticleForum Post: RE: AFE5808A part ADC output in offset binary and 2's complete...
Hi all, Please can somebody clarify my doubt mentioned in previous post. Thank you. Reards, chandu.
View ArticleForum Post: VSP2582 Test Enable bit?
Hi, We have been using the VSP2582 device on a product for many years and its is working very well. We just got a new batch of hardware in and we are experiencing bit issues on some of the new...
View ArticleForum Post: RE: AFE5808A part ADC output in offset binary and 2's complete...
1) According data sheet of AFE5808 , by default the ADC is capable of generating 14 bit signed 2's complement. It can also be configured to 12 bit. Am i right? The device is, but the EVM GUI might set...
View ArticleForum Post: AFE5808 output are different between CH1-4 and CH5-8 in...
Occasionally, I found AFE5808 output are different between CH1-4 and CH5-8 in toggle/ramp mode, for example: In toggle test mode: CH1-4 output are: -1 0 -1 0 -1 0 -1 0................ but CH5-8 output...
View ArticleForum Post: RE: AFE5808 output are different between CH1-4 and CH5-8 in...
From Xiaochen Xu: Please see reg 10[8], SYNC_Pattern in the 5808A datasheet pg. 31 SYNC_PATTERN: Address: 10[8] By enabling this bit, all channels' test pattern outputs are synchronized. When 10[8] is...
View ArticleForum Post: LM96511 -- fclk and bit clk relationship
Hi Team, I am trying to figure out how bit clk and fclk are related on the LM96511 . I am trying to include the FCO_CLK in the SDC file but I don't know why lvds_fco_clk is showing as N/A. Any guidance...
View ArticleForum Post: RE: LM96511 -- fclk and bit clk relationship
Hi Rob, It is not clear what you've shown (Multicorner Timing Analysis) and what LVDS_FCO_CLK are (as these names do not correlated to any pins / functions on the device) !? Are you working with the...
View ArticleForum Post: RE: LM96511 -- fclk and bit clk relationship
Hi Hooman I am trying to figure out the same issue. The specific signals can be found on page 24 of the LM96511 Data sheet. The signals of interest are ADC BCLK (bit clock) and the ADC WCLK (word...
View ArticleForum Post: Interfacing AFE5804 with TSW 1405
Hi, I have procured an AFE5804 EVM card ( but the project dint take off) and now I am in need of it. My idea s to make a complete receiver solution, using AFE5804 and TSW 1405 Data Capture card. My...
View ArticleForum Post: RE: Interfacing AFE5804 with TSW 1405
Anup, There is a way to capture the data directly using LV or Matlab. Our LV solution might be easier. Would you like that? Here is the mating connector: QSH-040-01-F-D-DP
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