Forum Post: RE: DAC161P997: Error reporting issues
Hi Sharada, The output current during an channel, parity, and frame errors is set by the ERRLVL pin. When the fault condition occurs the loop current will be one of the error levels but when the fault...
View ArticleForum Post: RE: ADS6445: DC input for ADS6445 and ADS5482
Hey Hirotaka, What is driving your need to DC-couple the input signal to this device? What is your input signal frequency/bandwidth? Thanks Yusuf
View ArticleForum Post: RE: ADS6445: DC input for ADS6445 and ADS5482
Also, What is your input signal frequency? Yusuf
View ArticleForum Post: RE: ADS1248: violating PGA Common-Mode Voltage Requirements but...
Christof, I'm sorry, but we don't have any more detail or data about the drive of the PGA going into the supply rails. Also, we don't have a convenient drop-in replacement device. As we've developed...
View ArticleForum Post: RE: TINA/Spice/ADC12DL3200: TINA/Spice/ADC12DL3200
Hi Jim, thanks for your suggestions. I've inserted the circuit below to have the lvds to lvpecl translation for SYS_REF signal. Do you think is a correct solution? If yes, I will close the chat….....
View ArticleForum Post: ADS5263: FPGA LVDS interface
Part Number: ADS5263 Hi, I would like to interface a quad channels ADS5263 in LVDS/2wires/8xSerialization mode to a FPGA. I was wondering if it would be possible to use the frame clock (ADCLK) to drive...
View ArticleForum Post: RE: TLC7226: DAC IC is failing
If Still more information required more than this I will share schema.
View ArticleForum Post: RE: ADS124S08: Configuring for a single-ended measurement
I had another go now with AIN7 set as the negative reference (0x87). The ADC still returns 128 (0x80). I also have AIN9 soldered to GND via a wire. I'm getting the same result for that combo.
View ArticleForum Post: AFE5401-Q1: Starting DSYNC1 as low, what other implications does...
Part Number: AFE5401-Q1 Hello, I have a question regarding the option DSYNC1_START_LOW in register 24. When I select this function, what implications does it have on the timing depicted in Figure 67 of...
View ArticleForum Post: RE: AFE5807EVM: two TSW1250EVM board synchronization and data...
LSB works!! Thank you!
View ArticleForum Post: RE: AFE5832: AFE5832 complete datasheet
Hello Sunny, I would like to take this conversation offline. Please send an email to mysecuresoftware_medical@list.ti.com
View ArticleForum Post: RE: ADC12DJ3200: The SYNC signal between ADC and Xilinx FPGA not...
Hi junsha Are you using the JESD204 IP Core from the FPGA vendor? Is this design based on the Xilinx or Altera example firmware found here? Look under the Software heading part way down the page....
View ArticleForum Post: RE: AFE5809: AFE5809EVM with TSW1400EVM
Hello Charles, Welcome to TI E2E forum. The FPGA firmware source code for the TSW1400 can be accessed from the TSW1400EVM tool folder at ti.com www.ti.com/.../tsw1400evm
View ArticleForum Post: RE: DAC5652A: Question about IOUTFS
Hi Aoyama-san We have received your question. One of our DAC experts will provide a more detailed response soon. Best regards, Jim B
View ArticleForum Post: ADC128S102: What is the number of transistor of thaT device?
Part Number: ADC128S102 Hi, Need number of transistor to calculate reliability please.
View ArticleForum Post: RE: ADC128S102: What is the number of transistor of thaT device?
Exact P/N used is ADC128S102WGRQV
View ArticleForum Post: RE: ADS1298: ADS1298 SPI
Hi Sagar, I am happy to help but I am having trouble following the questions at this point. Your clock signal should be a square wave, not a sine wave. I said this several posts ago. This thread should...
View ArticleForum Post: RE: ADS1263EVM-PDK: MMB0
This package installed only ADC_pro, which not include MMB0 driver. There is no such a directory C:\Program Files (x86)\ ADCPro \MMB0 Drivers Please help.
View ArticleForum Post: RE: ADS1263EVM-PDK: MMB0
This package installed only ADC_pro, which not include MMB0 driver. There is no such a directory C:\Program Files (x86)\ ADCPro \MMB0 Drivers
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