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Forum Post: RE: some questions about LM98620

Hello Sean, Here are responses to your questions: 1 Yes, the LM98620 can still be configured using SPI with OVPB is active low. The OVPB only protects the OS inputs against overvoltage. The LM98620 SPI...

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Forum Post: RE: Using LM98725

Hi Martin, Sorry about the delay. Jim and I are working on trying your register setting / conditions in our lab. I'll keep you posted as to what we might discover. Regards, Hooman

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Forum Post: LM9833 USB Communications

Is there any support information relating to the LM9833 USB comms interface? I need to determine whether control or interrupt transfers are used to access the chips internal registers. The data sheet...

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Forum Post: RE: TSW1400 Firmware Source for AFE5809EVM

Hi, Would you be able to upload the source code again for TSW1400 for AFE5809EVM as the above link is broken now. Thank you very much, Raunaq

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Forum Post: RE: some questions about LM98620

Hooman, Thanks you comment. How to connect BLKCLP, BLKCLP pin if them not used? Best Regards Sean zhang

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Forum Post: RE: LM9833 USB Communications

Hello Tim, I've attached a document.(Please visit the site to view this file) Section 8 of the attached document describes the USB endpoints. This document and some software source code is the extent...

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Forum Post: RE: some questions about LM98620

Hi Sean, If not being used, these inputs can be left floating. Regards, Hooman

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Forum Post: RE: Using LM98725

Hi Martin, We have used your register settings (file attached) and your clock frequency (5MHz) on the LM98725 and we don't see any problems with PLL lock! (Please visit the site to view this file)...

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Forum Post: RE: LM9833 USB Communications

Thank you for the document, this will be very useful. Section 9.1 of that document refers to a test bench and evaluation program '9832test.exe' and the 'LM983X.exe' TWAIN compliant software. Are these...

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Forum Post: RE: LM9833 USB Communications

Hi Tim, I've attached everything available on the LM9833 in the zip file below: (Please visit the site to view this file) Regards, Hooman

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Forum Post: RE: Using LM98725

Hi Hooman, Today I was working on the project and used 3MHz CMOS clock from FPGA, I notice an unusual condition for the PLL lock. When I start my FPGA and Lm98725 circuit for the first time the PLL...

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Forum Post: RE: Using LM98725

Hi Hooman, Today I was working on the project and used 3MHz CMOS clock from FPGA, I notice an unusual condition for the PLL lock. When I start my FPGA and Lm98725 circuit for the first time the PLL...

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Forum Post: RE: Using LM98725

Hi Hooman, I want to ask you that how can I configure the SH interval like its shown in the diagram. I'm using SH1 to generate Start Pulse for the sensor but this stops the Clock Pulse. What could be...

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Forum Post: RE: Using LM98725

Hi Hooman, Today I was working on the project and used 3MHz CMOS clock from FPGA, I notice an unusual condition for the PLL lock. When I start my FPGA and Lm98725 circuit for the first time the PLL...

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Forum Post: RE: Using LM98725

Hi Hooman, Today I was working on the project and used 3MHz CMOS clock from FPGA, I notice an unusual condition for the PLL lock. When I start my FPGA and Lm98725 circuit for the first time the PLL...

View Article


Forum Post: RE: Using LM98725

Today I used 3MHz CMOS clock, I notice an unusual condition for the PLL lock. When I start my FPGA and Lm98725 circuit for the first time the PLL don't get locked but if I restart my Lm98725 circuit...

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Forum Post: RE: Using LM98725

Hi Jim and Hooman, I have attached both pictures of the clock pulses on the first start without PLL lock and after restart picture.

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Forum Post: RE: Using LM98725

My second question is why there's a delay in the clock pulse after the SH interval (Marked in RED).

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Forum Post: RE: AFE5803 Interfacing

Sanders, It refers to both, meaning all LVDS traces should be within 150mil of each other. Chuck Smyth

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Forum Post: VSP5612/VSP5640 - layout guideline

HI, Could you share the layout guideline of VSP5612 /VSP5640 ? Thank you! Stanley

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