Forum Post: RE: ADC3422EVM: All pins info. for Port J13 on adc3422EVM board
Hi Chloe, thank you for help. this is exactly what I need, cheer Chun-I
View ArticleForum Post: AMC1210MB-EVM: Cannot download evaluation software
Part Number: AMC1210MB-EVM Hello TI Support, I have tried downloading the AMC1210MB-EVM evaluation software from AMC1210MC-EVM page, but have found the link doesn't work. When clicking the link, the...
View ArticleForum Post: RE: DAC904: power-up sequence
Hi Yusuf-san, Thank you for your support. I will wait for your team's reply. Best Regards, Yaita
View ArticleForum Post: RE: ADC12J1600: Fundamental tone attenuation
Hi Jim, Thank you. This works now. So, is our assumption the data rate and the framing is still as before? What did this NCO setting change? If NCO to DDC is 0, doesn't it mean no decimation?
View ArticleForum Post: TLV5623: How Can I use TLV5623 in a wav player?
Part Number: TLV5623 Hi, I'm using a TLV5623 DAC converter to reproduce .WAV files. I read files from an SDCard through STM32F401RE microcontroller , and after i put the data buffer into the DAC...
View ArticleForum Post: RE: Xilinx KCU105 with HSDC Pro - Error
Hi Aravind, Yes, you are correct that this appears to be a network issue. Do you have an option to use a router? Best Regards, Dan
View ArticleForum Post: RE: DAC161S997EVM: got the following error message when starting...
Hi Shai, Alright, please provide an update when he returns. Thanks, Garrett
View ArticleForum Post: RE: Xilinx KCU105 with HSDC Pro - Error
I do not have a router next to where the entire setup. I can try to get one, but is there a way to get it to work connecting directly to my laptop ethernet port . Seems bizarre that I have to go...
View ArticleForum Post: RE: DAC38RF83: Sync devices when the main clock is from DACCLKSE
Hi Moti, There are knobs such as RBD (release buffer delay) and DAC output delay register that can be used to align the phase of all TX outputs provided there is a fixed delay between the outputs. If...
View ArticleForum Post: RE: ADS127L01: Frame Sync Master + Daisy-Chain
Hi Even, Thank you for your post. The issue I see with this proposal is that the FSYNC period from the master device (ADC0) is only long enough to fit 32 SCLKs, where the SCLK frequency that is output...
View ArticleForum Post: RE: DAC38RF89: Confirming ILA_CFG
Hi Brian, 1) The purpose of tuning the PLL is to ensure the PLL stays locked over temperature. Without tuning, the PLL cannot be guaranteed to stay locked over temperature 3) Can you confirm how you...
View ArticleForum Post: RE: ADS1232 unwanted internal offset
Hi Bob, Thanks for helping me. Schematic: easyeda.com/.../ads1232 Load cell: www.hbm.cz/.../b1996.pdf
View ArticleForum Post: ADS7953: What is the programming sequence?
Part Number: ADS7953 I am looking at the reference manual for the ADS7953 A/D converter. It makes mention of the tables and says to use these as a reference. After reading it carefully, I still am...
View ArticleForum Post: RE: ADS8320: Excessive differential input voltage
Cynthia-san, Thank you for your reply. Is "0xFFF" correct? 0b 1111 1111 1111 1111 should be 0xFFFF. Best Regards, Kuramochi
View ArticleForum Post: RE: ADS1232 unwanted internal offset
Hi Erisson, Now I understand some of why the noise is higher. You have a voltage divider on the reference and are using 2.5V instead of 5V. The load cell sensitivity is 2mV/V and with 5V excitation the...
View ArticleForum Post: RE: ADC12J1600: Fundamental tone attenuation
Hi Mahesh Please refer to Figure 63. DDC Details Block Diagram in the ADC12J1600 datasheet. The NCO setting changes the frequency of the oscillator (digital Numerically Controlled Oscillator) which...
View ArticleForum Post: RE: ADS8881: ADS8881EVM-PDK Export the data
Hi,Tom-san. Thank you for your answer. I was able to clarify the question from the customer with your answer. Best Regards, Hiroaki Yuyama
View ArticleForum Post: RE: AMC1210MB-EVM: Cannot download evaluation software
Hi Tom, Thanks for the reply and help! I will mark the thread as solved when I am able to access the software. Kind Regards, Ben
View ArticleForum Post: RE: ADS1281: ADS1281 questions (data rate, pipelining, 24-bit...
Hi Dean, Welcome to the TI E2E Forums! To answer your questions.. The decimation ratios are absolute; however as you pointed out, the data rates will scale with the f CLK frequency. There is...
View ArticleForum Post: RE: ADS7953: What is the programming sequence?
Code is below SPI_Data_Block1[0] = 0x42; SPI_Data_Block1[1] = 0x00; PORTD.OUTCLR = PIN4_bm; ReceivedByte = SPI_Read_Poll1( &SPID, &PORTD, PIN4_bm, SPI_Data_Block1[0]); ReceivedByte =...
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