Forum Post: RE: LM98620 eval board schematic
Hi Hooman, What is the timing for generating CLPIN & BLKCLP. Is it during the light shield output (blanking period) from sensor. I have attached the timing chart of the CCD sensor I am using....
View ArticleForum Post: RE: AFE5809 test pattern generation problem
Hello Wei, Thanks for using our AFE5809 device. Before looking into your question, could you please let us know? Are you using the AFE5809 EVM right now? Also when you are using AFE5809 EVM, do you...
View ArticleForum Post: RE: LM98620 eval board schematic
Hi Prasanna Yes, the CLPIN and BLKCLP inputs should be asserted during the Light shield output pixels. Please refer to Figure 21 and Figure 24 and related text descriptions in the LM98620 datasheet....
View ArticleForum Post: RE: LM98620 eval board schematic
Hi Jim, Thanks for your reply. At present I have configured the AFE sample timing to SH1a mode. I have following questions 1. Do I have to still configure the DLL (position & width) or leave it at...
View ArticleForum Post: RE: AFE5809 test pattern generation problem
Chen, We are using our own board design, not an EVM. An update on our progress, we got the LVDS partially working (there was a bug in the FPGA that made it send wrong SPI commands, now that is fixed),...
View ArticleForum Post: RE: AFE5809 test pattern generation problem
I see the reason for why D2 and D1 LVDS outputs do not work. On section 8.6.1.2.8 of the datasheet, since we set the LVDS_OUTPUT_RATE_2X, it means D1 and D2 will not output anything. The question then...
View ArticleForum Post: RE: LM98620 eval board schematic
Hi Prasanna For SH1a mode you can leave the DLL sample position settings at defaults. You do not need to drive the SHD/HOLD or SHP/SAMPLE inputs. The sample and hold timing is driven from AFEPHASE...
View ArticleForum Post: RE: AFE5809 test pattern generation problem
Hi Wei, How are you? We think because you need to use AFE5809 's demod mode, that is the reason you will use sync word. Right? Using sync word, according to and following data sheet: First, you need to...
View ArticleForum Post: RE: AFE5809 test pattern generation problem
Chen, Thanks for the reply. We managed to get the full chain "working" from analog input to LVDS output. When we input a sine wave to the AFE we can see data on the LVDS lines. I believe it should be...
View ArticleForum Post: RE: Using LM98725
Hi Hooman, Thanks for your detail answer. For my CIS sensor SP signal, I set only one SH state length i.e SH State 0 on Page 3 Register 0 and all other state lengths should be zero because I need...
View ArticleForum Post: RE: Using LM98725
Hi Martin, Some responses to your questions in color below. For my CIS sensor SP signal, I set only one SH state length i.e SH State 0 on Page 3 Register 0 and all other state lengths should be zero...
View ArticleForum Post: RE: AFE5809 test pattern generation problem
Hi, Is it possible to get some more detailed help regarding how to set the registers? I feel that I cannot adequately explain the requirement here and trying things out on my own is time consuming when...
View ArticleForum Post: RE: AFE5809 test pattern generation problem
Hi Wei, Please let me try to contact some expert on the AFE5809 device very soon. Sorry for waiting. Thanks and best regards, Chen
View ArticleForum Post: RE: AFE5809 test pattern generation problem
Wei-Han, I am the applications engineer for the AFE5809 and I made the EVM and GUI, which I know that you are not using. The sync word and also 16-bit mode only work when you are using the DEMOD...
View ArticleForum Post: RE: AFE5809 test pattern generation problem
Chuck, We managed to correctly output a custom pattern with sync_word by having the ADC set to custom test pattern mode and the demodulator operating normally. This was just for testing purposes, for...
View ArticleForum Post: RE: AFE5809 test pattern generation problem
Wei-Han, If you are using the DEMOD, then you should see the sync word when a trigger is applied to the TX_sync_in pin. Data rate: This can confuse many people. Most ADC devices will reduce the output...
View ArticleForum Post: RE: Using LM98725
Hello Hooman, I haven't design schematic for the project yet right now I'm just configuring the registers through Arduino UNO (easy and fast) via SPI just to check the response of the LM98725 on...
View ArticleForum Post: LM98640 Digital I/O Voltage
I am working on a circuit board using LM98640 to interface an FPGA. The datasheet specifies digital supply voltage of 1.8V, but Electrical Characteristics table shows that VIH and VOH min is 2.0V and...
View ArticleForum Post: RE: LM98640 Digital I/O Voltage
Hi Simon, I am moving your post here to the Imaging forum that covers the device LM98640 . I'm sure you'll find an answer here.
View ArticleForum Post: RE: LM98640 Digital I/O Voltage
Hello Simon, The LVDS output runs off of the 1.8V drive. The rest of the part runs off of the 3.3V supply. The Vih and Voh are for the SPI and not for the LVDS output. Please see the LVDS Output table...
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